1. Field of the Invention
The present invention is related to a circuit for generating a clock data recovery phase locked indicator and method thereof, and particularly to a circuit for generating a clock data recovery phase locked indicator and method thereof that generate the clock data recovery phase locked indicator according to a plurality of alternating current terms generated after an oversampling operation is executed on data transmitted from a channel.
2. Description of the Prior Art
In the prior art, a locked indicator of a clock data recovery circuit based on a phase-locked loop can be generated according to a phase-locked loop locked indicator. In addition, a clock data recovery phase locked indicator can also be generated by transmitting a known bit pattern and checking a bit error rate of returned bits, or by comparing a known reference clock with a clock of a clock data recovery circuit.
However, if the clock data recovery circuit is not based on the phase-locked loop, the clock data recovery phase locked indicator can not be generated according to the phase-locked loop locked indicator. Therefore, for the clock data recovery circuit not based on the phase-locked loop, the prior art has to utilize the known bit pattern and known reference clock to generate the clock data recovery phase locked indicator from data transmitted from a channel. That is to say, the above mentioned methods for generating the clock data recovery phase locked indicator are not better choices for a user.